CIRCUIT DESIGN LMD-400-R Spezifikationen PDF herunterladen (Seite 10)

OG_LMD-400-R-AB_v10e Circuit Design, Inc.

OPERATION GUIDE

PLL IC CONTROL

z PLL IC control

LMD-400-R is equipped with an internal PLL frequency synthesizer as shown in Figure 1. The operation of the

PLL circuit enables the VCO to oscillate at a stable frequency. Transmission frequency is set externally by the

controlling IC. LMD-400-R has control terminals (CLK, LE, DATA) for the PLL IC and the setting data is sent to

the internal register serially via the data line. Also LMD-400-R has a Lock Detect (LD) terminal that shows the

lock status of the frequency. These signal lines are connected directly to the PLL IC through a 2 kΩ resistor.

The interface voltage of LMD-400-R is 2.8 V, so the control voltage must be the same.

LMD-400-R comes equipped with a Fujitsu MB15E03SL PLL IC. Please refer to the manual of the PLL IC.

The following is a supplementary description related to operation with LMD-400-R. In this description, the

same names and terminology as in the PLL IC manual are used, so please read the manual beforehand.

OSCin

OSCout

VCC

GND

Xf in

Fin

STD-302

Control pin name

Data

2kohm

MB15E03SL

Reference Oscillator

LPF

Voltage Controled

Oscillator

VCO

PLL

CLK

DATA

LD/f out

+2.8v

#:Control v oltage = +2.8v

21.25MHz

up to 1200MHz

Figure 1

CLK

2kohm

TCXO

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 19 20

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CIRCUIT DESIGN LMD-400-R Spezifikationen Seite 10